MAX1038, Greenhouse, Modulair carrier mid. console, DATASHEET
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//-->19-2442; Rev 3; 2/09KITATIONEVALUEBLAVAILA2.7V to 3.6V and 4.5V to 5.5V, Low-Power,4-/12-Channel 2-Wire Serial 8-Bit ADCsGeneral DescriptionThe MAX1036–MAX1039 low-power, 8-bit, multichannel,analog-to-digital converters (ADCs) feature internaltrack/hold (T/H), voltage reference, clock, and anI2C-compatible 2-wire serial interface. These devicesoperate from a single supply and require only 350µA atthe maximum sampling rate of 188ksps. Auto-Shutdown™ powers down the devices between conver-sions reducing supply current to less than 1µA at lowthroughput rates. The MAX1036/MAX1037 have four ana-log input channels each, while the MAX1038/MAX1039have twelve analog input channels. The analog inputs aresoftware configurable for unipolar or bipolar and single-ended or pseudo-differential operation.The full-scale analog input range is determined by theinternal reference or by an externally applied referencevoltage ranging from 1V to VDD. The MAX1037/MAX1039 feature a 2.048V internal reference and theMAX1036/MAX1038 feature a 4.096V internal reference.The MAX1036/MAX1037 are available in 8-pin SOT23packages. The MAX1038/MAX1039 are available in 16-pin QSOP packages. The MAX1036–MAX1039 are guar-anteed over the extended industrial temperature range(-40°C to +85°C). Refer to MAX1136–MAX1139 for 10-bitdevices and to the MAX1236–MAX1239 for 12-bitdevices.FeaturesoHigh-Speed I2C-Compatible Serial Interface400kHz Fast Mode1.7MHz High-Speed ModeoSingle Supply2.7V to 3.6V (MAX1037/MAX1039)4.5V to 5.5V (MAX1036/MAX1038)oInternal Reference2.048V (MAX1037/MAX1039)4.096V (MAX1036/MAX1038)oExternal Reference: 1V to VDDoInternal Clocko4-Channel Single-Ended or 2-Channel Pseudo-Differential (MAX1036/MAX1037)o12-Channel Single-Ended or 6-Channel Pseudo-Differential (MAX1038/MAX1039)oInternal FIFO with Channel-Scan ModeoLow Power350µA at 188ksps110µA at 75ksps8µA at 10ksps1µA in Power-Down ModeoSoftware Configurable Unipolar/BipolaroSmall Packages8-Pin SOT23 (MAX1036/MAX1037)16-Pin QSOP (MAX1038/MAX1039)Pin Configurations and Typical Operating Circuit appearat end of data sheet.MAX1036–MAX1039ApplicationsHandheld Portable ApplicationsMedical InstrumentsBattery-Powered Test EquipmentSolar-Powered Remote SystemsReceived-Signal-Strength IndicatorsSystem SupervisionOrdering Information/Selector GuidePARTMAX1036EKA+TMAX1037EKA+TMAX1038AEEE+MAX1039AEEE+PIN-PACKAGE8 SOT238 SOT2316 QSOP16 QSOPTUE(LSB)±2±2±1±1INPUTCHANNELS441212I2CSLAVE ADDRESS1100100110010011001011100101INTERNALREFERENCE (V)4.0962.0484.0962.048TOP MARKAAJEAAJG——+Denotesa lead(Pb)-free/RoHS-compliant package.T = Tape and reel.AutoShutdown is a trademark of Maxim Integrated Products, Inc.________________________________________________________________Maxim Integrated Products1For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,or visit Maxim's website at www.maxim-ic.com.2.7V to 3.6V and 4.5V to 5.5V, Low-Power,4-/12-Channel 2-Wire Serial 8-Bit ADCsMAX1036–MAX1039ABSOLUTE MAXIMUM RATINGSVDDto GND ..............................................................-0.3V to +6VAIN0–AIN11, REF toGND ......................-0.3V to the lower of (VDD+ 0.3V) and +6VSDA, SCL to GND.....................................................-0.3V to +6VMaximum Current Into Any Pin .........................................±50mAContinuous Power Dissipation (TA= +70°C)8-Pin SOT23 (derate 7.1mW/°C above +70°C).............567mW16-Pin QSOP (derate 8.3mW/°C above +70°C).........666.7mWOperating Temperature Range ...........................-40°C to +85°CJunction Temperature ......................................................+150°CStorage Temperature Range .............................-60°C to +150°CLead Temperature (soldering, 10s) .................................+300°CStresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functionaloperation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure toabsolute maximum rating conditions for extended periods may affect device reliability.ELECTRICAL CHARACTERISTICS(VDD= 2.7V to 3.6V (MAX1037/MAX1039), VDD= 4.5V to 5.5V (MAX1036/MAX1038). External reference, VREF= 2.048V(MAX1037/MAX1039), VREF= 4.096V (MAX1036/MAX1038). External clock, fSCL= 1.7MHz, TA= TMINto TMAX, unless otherwisenoted. Typical values are at TA= +25°C.)PARAMETERDC ACCURACY(Note 1)ResolutionRelative AccuracyDifferential NonlinearityOffset ErrorOffset Error TemperatureCoefficientGain ErrorGain Temperature CoefficientTotal Unadjusted ErrorChannel-to-Channel OffsetMatchingChannel-to-Channel GainMatchingInput Common-Mode RejectionRatioSignal-to-Noise Plus DistortionTotal Harmonic DistortionSpurious-Free Dynamic RangeChannel-to-Channel CrosstalkFull-Power BandwidthFull-Linear BandwidthCONVERSION RATEConversion Time (Note 5)tCONVInternal clockExternal clock4.76.1µsCMRRPseudo-differential input modeTUEMAX1036/MAX1037MAX1038A/MAX1039A(Note 3)±1±0.5±0.5±0.1±0.575±2±13±1INLDNL(Note 2)No missing codes over temperature8±1±1±1.5BitsLSBLSBLSBppm/°CLSBppm/°CLSBLSBLSBdBSYMBOLCONDITIONSMINTYPMAXUNITSDYNAMIC PERFORMANCE(fIN(sine wave)= 25kHz, VIN= VREF(P-P), fSAMPLE= 188ksps, RIN= 100Ω)SINADTHDSFDR(Note 4)-3dB pointSINAD > 49dBUp to the 5th harmonic49-6969752.0200dBdBdBdBMHzkHz2_______________________________________________________________________________________2.7V to 3.6V and 4.5V to 5.5V, Low-Power,4-/12-Channel 2-Wire Serial 8-Bit ADCsELECTRICAL CHARACTERISTICS (continued)(VDD= 2.7V to 3.6V (MAX1037/MAX1039), VDD= 4.5V to 5.5V (MAX1036/MAX1038). External reference, VREF= 2.048V(MAX1037/MAX1039), VREF= 4.096V (MAX1036/MAX1038). External clock, fSCL= 1.7MHz, TA= TMINto TMAX, unless otherwisenoted. Typical values are at TA= +25°C.)PARAMETERSYMBOLCONDITIONSInternal clock, SCAN[1:0] = 01(MAX1036/MAX1037)Throughput RatefSAMPLEInternal clock, SCAN[1:0] = 00CS[3:0] = 1011 (MAX1038/MAX1039)External clockTrack/Hold Acquisition TimeInternal Clock FrequencyAperture DelayANALOG INPUT (AIN0–AIN11)Input Voltage Range, SingleEnded and Differential (Note 6)Input Multiplexer Leakage CurrentInput CapacitanceINTERNAL REFERENCE(Note 7)Reference VoltageReference TemperatureCoefficientReference Short-Circuit CurrentReference Source ImpedanceEXTERNAL REFERENCEReference Input Voltage RangeREF Input CurrentInput High VoltageInput Low VoltageInput HysteresisInput CurrentInput CapacitanceOutput Low VoltageVREFIREFVIHVILVHYSTIINCINVOLISINK= 3mAVIN= 0 to VDD150.40.1 x VDD±10(Note 9)fSAMPLE= 188ksps0.7 x VDD0.3 x VDD1.014VDD30VµAVVVµApFV(Note 8)675VREFTCREFTA= +25°CMAX1037/MAX1039MAX1036/MAX10381.9253.8502.0484.096120102.1714.342Vppm/°CmAΩCINUnipolarBipolarOn/off-leakage current, VAIN_= 0 or VDD,no clock, fSCL= 0±0.0118VREF±VREF/ 2±1VµApFtADExternal clock, fast modeExternal clock, high-speed mode5882.254530MINTYPMAX7677188nsMHznskspsUNITSMAX1036–MAX1039DIGITAL INPUTS/OUTPUTS (SCL, SDA)_______________________________________________________________________________________32.7V to 3.6V and 4.5V to 5.5V, Low-Power,4-/12-Channel 2-Wire Serial 8-Bit ADCsMAX1036–MAX1039ELECTRICAL CHARACTERISTICS (continued)(VDD= 2.7V to 3.6V (MAX1037/MAX1039), VDD= 4.5V to 5.5V (MAX1036/MAX1038). External reference, VREF= 2.048V(MAX1037/MAX1039), VREF= 4.096V (MAX1036/MAX1038). External clock, fSCL= 1.7MHz, TA= TMINto TMAX, unless otherwisenoted. Typical values are at TA= +25°C.)PARAMETERPOWER REQUIREMENTSSupply Voltage (Note 10)VDDMAX1037/MAX1039MAX1036/MAX1038fSAMPLE=188kspsfSAMPLE=75kspsSupply CurrentIDDfSAMPLE=10kspsfSAMPLE=1kspsPower-downPower-Supply Rejection RatioSerial Clock FrequencyBus Free Time Between a STOPand a START ConditionHold Time for Start ConditionLow Period of the SCL ClockHigh Period of the SCL ClockSetup Time for a Repeated STARTCondition (Sr)Data Hold TimeData Setup TimeRise Time of Both SDA and SCLSignals, ReceivingFall Time of SDA TransmittingSetup Time for STOP ConditionCapacitive Load for Each Bus LinePulse Width of Spike SuppressedSerial Clock FrequencyHold Time (Repeated) StartConditionLow Period of the SCL ClockHigh Period of the SCL ClockPSRRfSCLtBUFtHD, STAtLOWtHIGHtSU, STAtHD, DATtSU, DATtRtFtSU, STOCBtSPfSCLHtHD, STAtLOWtHIGH(Note 14)160320120(Note 13)(Note 13)(Note 12)1.30.61.30.60.610020 + 0.1CB20 + 0.1CB0.6400501.7300300150(Note 11)TIMING CHARACTERISTICS FOR 2-WIRE FAST MODE(Figures 1A and 2)400kHzµsµsµsµsµsnsnsnsnsµspFnsMHznsnsnsInternal REF, external clockExternal REF, external clockExternal REF, external clockExternal REF, internal clockExternal REF, external clockExternal REF, internal clockExternal REF, external clockExternal REF, internal clock2.74.535025011015081022.51±0.2510±1LSB/VµA3.65.5650VSYMBOLCONDITIONSMINTYPMAXUNITSTIMING CHARACTERISTICS FOR 2-WIRE HIGH-SPEED MODE(Figures 1B and 2)4_______________________________________________________________________________________2.7V to 3.6V and 4.5V to 5.5V, Low-Power,4-/12-Channel 2-Wire Serial 8-Bit ADCsELECTRICAL CHARACTERISTICS (continued)(VDD= 2.7V to 3.6V (MAX1037/MAX1039), VDD= 4.5V to 5.5V (MAX1036/MAX1038). External reference, VREF= 2.048V(MAX1037/MAX1039), VREF= 4.096V (MAX1036/MAX1038). External clock, fSCL= 1.7MHz, TA= TMINto TMAX, unless otherwisenoted. Typical values are at TA= +25°C.)PARAMETERSetup Time for a Repeated STARTCondition (Sr)Data Hold TimeData Setup TimeRise Time of SCL Signal(Current Source Enabled)Rise Time of SCL Signal AfterAcknowledge BitFall Time of SCL SignalRise Time of SDA SignalFall Time of SDA SignalSetup Time for STOP ConditionCapacitive Load for Each Bus LinePulse Width of Spike SuppressedSYMBOLtSU,STAtHD,DATtSU,DATtRCLtRCL1tFCLtRDAtFDAtSU,STOCBtSP(Note 13)(Note 13)(Note 13)(Note 13)(Note 13)(Note 12)CONDITIONSMIN160102020202020160400108016080160160150TYPMAXUNITSnsnsnsnsnsnsnsnsnspFnsMAX1036–MAX1039Note 1:The MAX1036/MAX1038 are tested at VDD= 5V and the MAX1037/MAX1039 are tested at VDD= 3V. All devices are config-ured for unipolar, single-ended inputs.Note 2:Relative accuracy is the deviation of the analog value at any code from its theoretical value after the full-scale range andoffsets have been calibrated.Note 3:Offset nulled.Note 4:Ground on channel; sine wave applied to all off channels.Note 5:Conversion time is defined as the number of clock cycles (8) multiplied by the clock period. Conversion time does notinclude acquisition time. SCL is the conversion clock in the external clock mode.Note 6:The absolute voltage range for the analog inputs (AIN0–AIN11) is from GND to VDD.Note 7:When AIN_/REF is configured to be an internal reference (SEL[2:1] = 11), decouple AIN_/REF to GND with a 0.01µF capacitor.Note 8:The switch connecting the reference buffer to AIN_/REF has a typical on-resistance of 675Ω.Note 9:ADC performance is limited by the converter’s noise floor, typically 1.4mVP-P.Note 10:Electrical characteristics are guaranteed from VDD(min)to VDD(max). For operation beyond this range, see theTypicalOperating Characteristics.Note 11:Power-supply rejection ratio is measured as:[VFS(3.3V)−VFS(2.7V)×3.3V−2.7V]2NVREF, for the MAX1037/MAX1039 where N is the number of bits and VREF= 2.048V.Power-supply rejection ratio is measured as:[VFS(5.5V)−VFS(4.5V)×5.5V−4.5V]2NVREF, for the MAX1036/MAX1038 where N is the number of bits and VREF= 4.096V.Note 12:A master device must provide a data hold time for SDA (referred to VILof SCL) in order to bridge the undefined region ofSCL’s falling edge (Figure 1).Note 13:CB= total capacitance of one bus line in pF. tRand tFmeasured between 0.3VDDand 0.7VDD. Minimum specification istested at +25°C with CB= 400pF.Note 14:fSCLHmust meet the minimum clock low time plus the rise/fall times._______________________________________________________________________________________5
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